VSD Intern - Mixed Signal Physical Design Flow with Sky130 from Udemy

This course describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, OpenLANE. It also discusses the steps to modify the current IP layouts in order to ensure its acceptance by the EDA tools

Mixed signal SoC is a chip which contains both analog and digital blocks. The designers are adding more analog circuitry and increasing their complexities day by day. Not only that, they also contain digital control logic. As the process nodes shrink, the demand for integration grows. A divide and conquer approach is followed, where the analog and digital structures were dealt with separately. Usually, an analog IP (Intellectual Property) is bought as black- box

To implement a RTL-to-GDS flow for mixed signal SoC, there is need to establish communication between the analog and digital blocks. For this integration to happen, hierarchical level of abstraction with either analog or digital as top level is required. In order to carry out this task, OpenROAD project can be utilized

Hope you enjoy the session. Any constructive feedback is appreciated

Future Work

To include custom LIB for macro and include timing constraints.
To perform PNR on macro of triple-height or more

Acknowledgement

Kunal Ghosh, Co-founder, VSD Corp. Pvt. Ltd
Openlane team, Efabless corporation
Tim Edwards, Senior Vice President of Analog and Design at efabless corporation
Nickson Jose, VLSI Engineer
Prithivi Raj K, National Institute of Technology Tiruchirapalli

What's inside

Learning objectives

Multi-height rtl2gds flow for mixed signal soc
Steps to convert basic analog block to hard-macro

Steps to use hard-macro in openlane rtl2gds flow
Labs to verify macro based physical design flow

Multi-height rtl2gds flow for mixed signal soc
Steps to convert basic analog block to hard-macro
Steps to use hard-macro in openlane rtl2gds flow
Labs to verify macro based physical design flow

Syllabus

Generating hard-macro LEF for basic analog block

Introduction to mixed-signal flow and EDA tools used

Macro LEF file modification

Steps to create pins in macro LEF

Steps to modify LEF class, origin and site properties

Steps to modify LEF bounding box property

Steps to modify LEF port property

LEF file modifications summary

Macro based RTL2GDS using OpenLANE/Sky130

Steps to setup new OpenLANE project

Steps to setup input files in OpenLANE project

Steps to setup macro LEF files for OpenLANE flow

Final OpenLANE config file settings

Prep design and add LEFs in OpenLANE flow

RTL2GDS Physical Design flow steps

Short theory on RTL2GDS flow

RTL synthesis and floorplan step

Global and detailed placement

Tap-Decap detailed placement

PDN generation

Final routing and GDS generation

Final layout review and conclusion

Activities

Be better prepared before your course. Deepen your understanding during and after it. Supplement your coursework and achieve mastery of the topics covered in VSD Intern - Mixed Signal Physical Design Flow with Sky130 with these activities:

Review Basic VLSI Concepts

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Strengthen your understanding of fundamental VLSI concepts to better grasp the mixed-signal design flow.

Browse courses on VLSI Design

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Review textbooks or online resources on VLSI design principles.
Practice solving basic circuit design problems.
Familiarize yourself with common VLSI design terminology.

Brush Up on Layout Design

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Improve your layout design skills to effectively modify IP layouts for EDA tool compatibility.

Browse courses on Layout Design

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Review layout design principles and best practices.
Practice creating and modifying layouts using a layout editor.
Study examples of good and bad layout practices.

Read 'CMOS Circuit Design, Layout, and Simulation'

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Gain a deeper understanding of CMOS circuit design principles and layout techniques.

View CMOS: Circuit Design, Layout, and Simulation... on Amazon

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Read the chapters related to layout and simulation.
Work through the examples and exercises in the book.
Experiment with different layout techniques using a layout editor.

Five other activities

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Follow OpenLANE Tutorials

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Learn the specifics of using OpenLANE for RTL2GDS flow by following online tutorials.

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Find and follow tutorials on setting up and using OpenLANE.
Experiment with different OpenLANE configurations.
Try to replicate the examples shown in the tutorials.

Practice LEF File Modification

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Reinforce your understanding of LEF file structure and modification techniques.

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Obtain sample LEF files for different analog blocks.
Practice modifying the LEF files to change pin locations, bounding boxes, and other properties.
Verify the modified LEF files using a LEF parser.

Create a Hard-Macro LEF for a Simple Analog Block

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Apply your knowledge to create a LEF file for a basic analog block, solidifying your understanding of the process.

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Choose a simple analog block, such as a current mirror or a differential pair.
Create a layout for the chosen analog block.
Generate a LEF file for the layout, ensuring correct pin placement and bounding box definition.
Verify the LEF file using OpenLANE.

Read 'Analog Design Essentials'

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Deepen your understanding of analog design principles relevant to mixed-signal SoC design.

View Analog Design Essentials on Amazon

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Focus on chapters related to amplifier design and layout considerations.
Study the examples of analog circuit design and layout techniques.
Consider how these techniques can be applied to the design of hard-macros.

Contribute to OpenLANE Documentation

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Improve your understanding of OpenLANE by contributing to its documentation.

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Identify areas in the OpenLANE documentation that are unclear or incomplete.
Write clear and concise documentation to address the identified issues.
Submit your documentation changes to the OpenLANE project.

Career center

Learners who complete VSD Intern - Mixed Signal Physical Design Flow with Sky130 will develop knowledge and skills that may be useful to these careers:

Physical Design Engineer

A Physical Design Engineer focuses on the physical implementation of integrated circuits. This involves taking a design from its logical representation to its physical layout, ensuring it meets performance, power, and area requirements. This course specifically addresses the physical design flow using open-source EDA tools like OpenLANE, which is directly relevant to a Physical Design Engineer's work. Deepening your knowledge of how to carry out the placement and routing of an analog IP will enhance your ability to tackle complex mixed-signal designs. Understanding how to modify IP layouts to ensure compatibility with EDA tools, as covered in this course, is crucial for success as a Physical Design Engineer.

See salaries and explore the career path for Physical Design Engineer

IC Layout Engineer

The IC Layout Engineer is responsible for the physical layout of integrated circuits, ensuring that the design meets performance and manufacturability requirements. This course dives directly into the practical aspects of IC layout, focusing on the use of OpenLANE and the Sky130 process for mixed-signal designs. The course's detailed coverage of generating hard-macro LEF files and modifying IP layouts aligns perfectly with the day-to-day tasks of an IC Layout Engineer. Using the concepts taught in this course helps build a strong basis as an IC Layout Engineer.

See salaries and explore the career path for IC Layout Engineer

VLSI Engineer

A Very Large Scale Integration Engineer is responsible for designing and implementing integrated circuits. This role requires a deep understanding of digital and analog circuit design, as well as knowledge of physical design and fabrication processes. A VLSI Engineer can directly apply the knowledge of mixed-signal SoC design and RTL-to-GDS flow learned in this course. Understanding the process of converting basic analog blocks to hard-macros and integrating them into OpenLANE RTL2GDS flows is highly beneficial. The hands-on labs in the course provide practical experience to support the role of VLSI Engineer.

See salaries and explore the career path for VLSI Engineer

Design Automation Engineer

A Design Automation Engineer develops and maintains scripts and flows used in the design and verification of integrated circuits. Since this course leverages open source tools, this course is particularly appropriate for the Design Automation Engineer. Specifically, the exploration of generating hard-macro LEF files and setting up RTL2GDS flows directly relates to the work of a Design Automation Engineer in optimizing and automating design processes. Design Automation Engineer candidates may find that completing this course helps them on their career trajectory.

See salaries and explore the career path for Design Automation Engineer

Research and Development Engineer

A Research and Development Engineer explores new technologies and develops innovative solutions in the field of electronic design. The course's exploration of an open-source EDA toolchain for mixed-signal design is aligned with the goals of an R&D Engineer who is looking to evaluate and improve existing design methodologies. The process of generating hard-macro LEF files and customizing RTL2GDS flows is helpful for Research and Development Engineers to succeed in pushing the boundaries of electronic design. Typically, a role like this requires an advanced degree.

See salaries and explore the career path for Research and Development Engineer

Analog Layout Designer

The Analog Layout Designer creates the physical layout of analog integrated circuits. This role demands a deep understanding of device physics, circuit behavior, and layout techniques to optimize performance and minimize signal interference. This course provides targeted insights into the physical design flow for mixed-signal SoCs using tools like OpenLANE and the Sky130 process. The course content on generating hard-macro LEF files for basic analog blocks directly supports an Analog Layout Designer's need to represent and integrate analog components effectively. This course may be useful for an Analog Layout Designer who wants to learn more about mixed-signal designs.

See salaries and explore the career path for Analog Layout Designer

Circuit Design Engineer

A Circuit Design Engineer designs and simulates analog, digital, or mixed-signal circuits. This course provides insight into mixed-signal design flows, particularly the integration of analog blocks with digital control logic. Although a Circuit Design Engineer may focus more on the circuit-level design, understanding the physical implementation aspects covered in this course will provide a more holistic view of the design process. The course helps build a foundation in the field of circuit design.

See salaries and explore the career path for Circuit Design Engineer

Mixed Signal Integrated Circuit Designer

A Mixed Signal Integrated Circuit Designer works on circuits that combine both analog and digital components on a single chip. This role requires a broad understanding of both analog and digital design principles. This course directly addresses the challenges of mixed-signal SoC design, particularly the integration of analog IPs into a digital flow using OpenROAD. Learning about establishing communication between analog and digital blocks, using hierarchical levels of abstraction, as this course teaches, helps build a pathway to success in the field. This course may be useful for a Mixed Signal Integrated Circuit Designer searching to round out their knowledge of the physical process.

See salaries and explore the career path for Mixed Signal Integrated Circuit Designer

Electronic Design Automation Tool Developer

An Electronic Design Automation Tool Developer creates and improves the software tools used by engineers to design electronic systems. The course's practical application of OpenLANE, an open-source EDA tool, makes it particularly relevant for an EDA Tool Developer seeking to understand the tool's capabilities and limitations. Deepening experience with the modification of LEF files and setup of RTL2GDS flows, provides valuable insight into the needs of design engineers, allowing the developer to create more effective and user-friendly tools. This course may be useful to an Electronic Design Automation Tool Developer.

See salaries and explore the career path for Electronic Design Automation Tool Developer

CAD Engineer

A Computer Aided Design Engineer develops and supports the software tools used to design integrated circuits. Enhancing your knowledge of the OpenLANE tool and its application to mixed-signal designs, as this course provides, is extremely relevant for a CAD Engineer supporting this tool. The hands-on experience with modifying LEF files and setting up RTL2GDS flows provides valuable insights into the tool's usage and potential issues. This course may be useful for a CAD Engineer who wishes to gain more information on the applications of CAD.

See salaries and explore the career path for CAD Engineer

Application Engineer

An Application Engineer provides technical support and guidance to customers using a company's products. In the context of EDA tools and IP, this means helping customers integrate and utilize the tools and IPs effectively in their designs. This course may be useful because it provides practical experience with the OpenLANE tool and the Sky130 process, allowing an Application Engineer to better understand the challenges and solutions involved in using these technologies. The course's focus on generating hard-macro LEF files and performing RTL2GDS flows equips the engineer to demonstrate and support these flows for customers.

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RTL Design Engineer

An RTL Design Engineer is responsible for designing digital circuits using Register Transfer Level languages, such as Verilog or VHDL. The course covers the RTL-to-GDS flow, which is the process of converting an RTL design into a physical layout. RTL Design Engineers will find the course material regarding RTL synthesis and floor-planning helpful. This course may be useful for a RTL Design Engineer looking to broaden their background in design.

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Hardware Engineer

A Hardware Engineer designs, develops, and tests computer hardware systems and components. The role requires a strong understanding of digital logic, computer architecture, and electronic circuits. This course may be useful because it offers insights into the physical implementation of mixed-signal systems. While the course focuses on a specific design flow, it provides a valuable perspective on the complexities and challenges involved in creating physical hardware. Hardware Engineer candidates may find this course helpful if they wish to gain knowledge of the design process.

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Semiconductor Device Engineer

A Semiconductor Device Engineer focuses on the design, fabrication, and testing of semiconductor devices. Although this role is more focused on device physics and manufacturing processes, understanding the physical design flow is still valuable. The course's exploration of the Sky130 process, a specific technology node, and the steps involved in creating physical layouts can provide valuable context for a Semiconductor Device Engineer. This course may be useful to a Semiconductor Device Engineer who is interested in the overall lifecycle of semiconductor devices.

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Technical Marketing Engineer

A Technical Marketing Engineer bridges the gap between engineering and sales, communicating the technical features and benefits of a product to potential customers. The practical experience gained from this course will help the Technical Marketing Engineer better understand and articulate the capabilities of mixed-signal design flows using OpenLANE and the Sky130 process. This course may be useful to a Technical Marketing Engineer who is attempting to break into physical layout.

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VSD Intern - Mixed Signal Physical Design Flow with Sky130

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