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Mohammad Hosseinbady

This course is an elementary introduction to high-level synthesis (HLS) design flow. The goals of the course are describing, debugging and implementing combinational logic circuits on FPGAs using only C/C++ language without any help from HDLs (e.g., VHDL or Verilog). The HLS is recently used by several industry leaders (such as Nvidia and Google) to design their hardware and software platforms. The HLS design flow is the future of hardware design, which quickly becomes a must-have skill for every hardware or software engineer who is keen on utilising FPGAs for their exceptional performance and low power consumption.

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This course is an elementary introduction to high-level synthesis (HLS) design flow. The goals of the course are describing, debugging and implementing combinational logic circuits on FPGAs using only C/C++ language without any help from HDLs (e.g., VHDL or Verilog). The HLS is recently used by several industry leaders (such as Nvidia and Google) to design their hardware and software platforms. The HLS design flow is the future of hardware design, which quickly becomes a must-have skill for every hardware or software engineer who is keen on utilising FPGAs for their exceptional performance and low power consumption.

It uses the Xilinx HLS software and hardware platforms to demonstrate real examples and applications. This course is the first to build the HLS design flow and skills along with the digital logic circuit concepts from scratch. Throughout the course, you will follow several examples describing HLS concepts and techniques. The course contains numerous quizzes and exercises for you to practice and master the proposed methods and approaches.

This course is the first of a series of courses on HLS in designing hardware modules and accelerating algorithms on a target FPGA. Whereas this course focuses on combinational circuits. The other courses in the series will explain how to use HLS in designing sequential logic circuits, algorithm acceleration, and hybrid CPU+ FPGA heterogeneous systems.

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What's inside

Learning objectives

  • Designing combinational logic circuits with c/c++ language using the hls approach
  • Understanding the basic concepts of high-level synthesis (hls)
  • Using hls concepts for designing combinational logic circuits
  • Hls design flow for fpgas
  • Working with xilinx vitis-hls and vivado suite toolsets
  • How to generate rtl hardware ips using vitis-hls
  • Writing c-testbench in hls
  • Implementing two exciting projects with hls

Syllabus

The main goals here are introducing the course and specifying the target students. After finishing this section, you should know that if this course is the one you were looking for.
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Traffic lights

Read about what's good
what should give you pause
and possible dealbreakers
Introduces high-level synthesis (HLS) design flow, which is increasingly used in industry for hardware and software platforms
Uses Xilinx Vitis-HLS and Vivado, which are industry-standard software and hardware platforms, to demonstrate real-world examples and applications
Focuses on combinational circuits, which are fundamental building blocks in digital logic design and essential for understanding more complex systems
Requires the Basys3 FPGA development board, which may require additional costs for learners who do not already have access to one
Is the first in a series of courses, suggesting a comprehensive and in-depth exploration of HLS for FPGA design
Teaches C/C++ for hardware design, which may require learners to have prior experience with these programming languages

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Reviews summary

Hls for fpga with c/c++ basics

According to learners, this course offers a largely positive introduction to High-Level Synthesis (HLS) for FPGA combinational circuits using C/C++. Students highlight the clear explanations of HLS concepts and how C/C++ translates to hardware. The hands-on labs using Xilinx Vitis-HLS are frequently mentioned as a valuable part of the learning experience, helping to build a solid foundation in the HLS design flow. However, a significant point raised by many is the difficulty and complexity of setting up the required Xilinx software tools (Vitis-HLS and Vivado), which some found to be a major barrier or a time-consuming process that required troubleshooting outside the course material. The course also requires specific Basys3 FPGA hardware for the implementation labs, which is noted as a potential requirement or extra cost.
Provides valuable hands-on tool practice.
"...the hands-on labs using Vitis-HLS and the Basys3 board were incredibly useful."
"The labs guide you step-by-step through the Vitis-HLS flow."
"The hands-on nature with Vitis-HLS is invaluable."
"The labs provide necessary hands-on experience with Vitis-HLS."
Explains key HLS ideas effectively.
"The explanations of HLS concepts were crystal clear, and the hands-on labs using Vitis-HLS and the Basys3 board were incredibly useful."
"Prof. [Instructor Name - hypothetical] explains complex topics clearly."
"A solid foundation for further HLS study."
"Covers the fundamentals of HLS for combinational logic thoroughly."
Specific Basys3 FPGA board is needed.
"The Basys3 board examples are good if you have the hardware, but less relevant otherwise."
"Having the Basys3 board is helpful but not strictly necessary to understand the HLS flow itself, though the final implementation labs require it."
"Having the Basys3 board enhances the experience greatly."
"The primary hurdle is definitely... having the Basys3 board."
Setup for Xilinx software is challenging.
"Setting up the Xilinx tools (Vitis-HLS and Vivado) was a bit tricky, requiring a large download and specific licenses sometimes..."
"My main issue was the toolchain setup – it felt like an afterthought and took me longer than the course material itself."
"Be prepared for tool frustrations."
"Found this course quite difficult to follow at times... I struggled with the exercises."
"The biggest challenge is the required software suite (Vivado/Vitis-HLS), which is massive and complex to install and license. Wish there was a dedicated module just on tool setup..."
"The real struggle is with the tool setup and usage outside the very specific examples shown."

Activities

Be better prepared before your course. Deepen your understanding during and after it. Supplement your coursework and achieve mastery of the topics covered in High-Level Synthesis for FPGA, Part 1-Combinational Circuits with these activities:
Review Digital Logic Fundamentals
Reinforce your understanding of fundamental digital logic concepts. This will provide a solid foundation for understanding how HLS translates C/C++ code into hardware.
Browse courses on Combinational Logic
Show steps
  • Review truth tables for basic logic gates.
  • Practice simplifying Boolean expressions.
  • Study the operation of multiplexers and decoders.
Read 'Digital Design and Computer Architecture' (Harris & Harris)
Gain a deeper understanding of digital design principles. This book will help you understand the underlying hardware concepts that HLS abstracts away.
Show steps
  • Read the chapters on combinational logic design.
  • Work through the examples and exercises.
  • Focus on understanding the relationship between logic gates and Boolean expressions.
Complete Xilinx Vitis HLS Tutorials
Familiarize yourself with the Xilinx Vitis HLS tool. Working through the official tutorials will provide hands-on experience with the HLS design flow.
Show steps
  • Download and install the Xilinx Vitis HLS software.
  • Locate the official Vitis HLS tutorials on the Xilinx website.
  • Work through the tutorials on combinational logic design.
  • Experiment with different HLS directives to optimize performance.
Four other activities
Expand to see all activities and additional details
Show all seven activities
Implement Combinational Circuits in HLS
Practice implementing various combinational circuits using HLS. This will reinforce your understanding of how to translate C/C++ code into hardware.
Show steps
  • Choose a set of combinational circuits to implement (e.g., adders, multipliers, encoders).
  • Write C/C++ code to describe the functionality of each circuit.
  • Use Vitis HLS to synthesize the code into RTL.
  • Simulate the RTL to verify its correctness.
Document HLS Design Process
Create a blog post or tutorial documenting your experience with HLS. Explaining the concepts to others will solidify your own understanding.
Show steps
  • Choose a specific aspect of HLS to focus on.
  • Write a clear and concise explanation of the concept.
  • Include code examples and diagrams to illustrate the concept.
  • Publish your blog post or tutorial online.
HLS-Based Image Filter
Apply your HLS skills to a practical project. Implementing an image filter will provide experience with more complex combinational logic designs.
Show steps
  • Choose an image filter algorithm to implement (e.g., Gaussian blur, edge detection).
  • Write C/C++ code to implement the filter algorithm.
  • Use Vitis HLS to synthesize the code into RTL.
  • Integrate the RTL into a larger system for image processing.
Read 'High-Level Synthesis: From Algorithm to Digital Circuit' (Daniel Gajski et al.)
Deepen your understanding of HLS theory and practice. This book provides a more in-depth look at the algorithms and techniques used in HLS tools.
Show steps
  • Read the chapters on scheduling and resource allocation.
  • Study the examples of HLS design flows.
  • Focus on understanding the trade-offs between performance and resource utilization.

Career center

Learners who complete High-Level Synthesis for FPGA, Part 1-Combinational Circuits will develop knowledge and skills that may be useful to these careers:
FPGA Design Engineer
A FPGA Design Engineer focuses on creating and implementing digital circuits on Field Programmable Gate Arrays. This role involves a strong understanding of hardware description languages and design tools. This course, focused on high-level synthesis for FPGA, provides a valuable alternative to traditional hardware description language design flows. It helps build a foundation in implementing combinational logic circuits, using C/C++, which is a valuable skill for an FPGA design engineer. The course teaches how to use Xilinx Vitis-HLS and Vivado, which are frequently used by FPGA design engineers in industry. The exercises and projects in this course, such as controlling LEDs and seven-segment displays, help solidify theoretical knowledge into practical skills useful in a real design environment.
Hardware Engineer
A Hardware Engineer designs, develops, and tests physical components of computer systems and related devices. This often involves digital logic and circuit design. This course focuses on applying high-level synthesis to Field Programmable Gate Array design using C/C++, which is valuable for hardware engineers involved in digital design. High-level synthesis allows them to abstract away from the low-level hardware details. This course provides an introduction to working with Xilinx Vitis-HLS and Vivado software, which is widely used in hardware engineering. The course will help build a foundation in hardware design principles, and the ability to develop and test hardware directly utilizing an FPGA. The labs, exercises, and projects in this course, focused on combinational logic, provide practical experience that is highly beneficial for a hardware engineer.
Embedded Systems Engineer
An Embedded Systems Engineer designs and develops software and hardware for embedded systems, those being systems within a larger device. This role frequently involves working with microcontrollers and FPGAs. This course may provide a useful entry into using high-level synthesis to program FPGAs, specifically focusing on implementing combinational logic circuits with C/C++. The course introduces the Xilinx HLS software and hardware platforms. The course will help build a foundation in understanding how hardware can be controlled and configured, which is directly relevant to an embedded systems engineer. Working through the examples and labs in this course offers practical experience that is immediately applicable to the kind of work done by embedded systems engineers, particularly those working with FPGAs.
Firmware Engineer
A Firmware Engineer develops low-level software that controls the hardware of a device, typically working near the interface between software and hardware. This role frequently requires a solid understanding of digital logic and how to configure hardware peripherals. This course may be useful in that it introduces the use of high-level synthesis for FPGA design, specifically focusing on implementing combinational logic using C/C++. It offers practical experience in using high-level synthesis tools, like Xilinx Vitis-HLS and Vivado to implement digital logic. This introduces the essential skills and knowledge in designing and testing hardware implementations through software. The exercises and projects in this course, focused on building digital circuits, may help a firmware engineer gain a better understanding of what is happening at the hardware level.
Verification Engineer
A Verification Engineer is responsible for developing and executing test plans to ensure the quality of hardware designs, often focusing on simulation and testing of digital circuits. This course introduces the use of high-level synthesis for FPGA design, emphasizing the design and implementation of combination logic circuits using C/C++. Although a verification engineer may not do the design themselves, a familiarity with this process is helpful, especially with C-testbench generation. This course also introduces working with simulation flow, which may help build a foundation in creating effective tests. The course’s focus on using tools like Xilinx Vitis-HLS and Vivado is useful because it mirrors the industry standard workflow. The hands-on experience gained through the course may be valuable in understanding the potential pitfalls that can appear in a design.
Computer Architect
A Computer Architect works on the overall design and organization of computer systems, often focusing on how to optimize performance. This role often requires a deep understanding of hardware and digital logic design, including how to target specialized hardware like FPGAs. This course may be helpful as it teaches the high-level synthesis approach to designing combinational logic on FPGAs using C/C++. This can help a computer architect understand the capabilities and limitations of programmable logic. The course provides an introduction to high-level synthesis with tools like Xilinx Vitis-HLS, and may help give a better understanding of how hardware can be designed. The course’s use of practical examples and exercises may provide a helpful theoretical background in the lower-level of system design.
Research Scientist
A Research Scientist in a hardware or computer engineering field investigates and develops new technologies or algorithms, often using both software and hardware. This course may be helpful in understanding the high-level synthesis design flow for implementing hardware functions using C/C++. A Research Scientist typically needs a broad understanding of hardware design and may find this course useful by learning how C/C++ can be used to target FPGA devices. The course introduces the use of Xilinx Vitis-HLS and Vivado, which is valuable for research work involving hardware. The work in this course on combinational logic may be insightful for researchers working with specialized hardware, or those investigating high-performance system-on-a-chip solutions. This course may help build a foundation in understanding how to target custom hardware.
Application Engineer
An Application Engineer provides technical support to customers for a specific product, often requiring a deep understanding of both the product's features and its technical implementation. This course introduces the high-level synthesis design flow for FPGAs, which is the future of hardware design. The course, which focuses on using C/C++ to implement combinational logic circuits, may be a helpful introduction. This may a helpful background to provide technical assistance to customers using hardware or software products tied to this technology. The course’s focus on using Xilinx Vitis-HLS and Vivado tools aligns with the industry standard, which may help an application engineer understand the product more deeply. The practical exercises done in the course’s labs may provide deeper insight into the technology.
Robotics Engineer
A Robotics Engineer designs, builds, and tests robots and robotic systems. This role requires a background in both software and hardware. This course, which introduces the high-level synthesis design flow for FPGAs, may be helpful, especially for robotics engineers working with specialized hardware or real-time processing. By working through the exercises in this course, a robotics engineer may gain a better understanding of how to implement hardware functions and utilize C/C++, along with the Xilinx tools, to target FPGAs. While a robotics engineer may not be designing custom hardware in many cases, this course may help to build some understanding of the lower-level hardware.
System Architect
A System Architect is responsible for designing the overall structure of a system, which can include hardware and software. This role requires a broad understanding of both areas. This course may be useful as it introduces high-level synthesis for designing hardware on FPGAs, focusing specifically on designing combinational logic circuits with C/C++. A system architect needs to understand how various components work together, and this course can provide a new perspective on hardware that is software centric. While a system architect may not be doing the actual design themselves, they can use the knowledge to understand the implications of a hardware implementation. The experience in this course with tools like Xilinx Vitis-HLS may allow a system architect to make informed decisions about hardware use.
Data Scientist
A Data Scientist analyzes large datasets and extracts meaningful insights, often requiring proficiency in programming and statistical analysis. This course may be useful in that it introduces the high-level synthesis design flow for FPGAs, allowing a Data Scientist to explore the possibilities of hardware acceleration for computationally intensive tasks. The course teaches how to implement digital logic using C/C++ and how to work with the Xilinx toolchain. While not directly related to data analysis, this course may help Data Scientists explore how hardware can be used to improve the performance of their data analysis tools or algorithms.
Software Engineer
A Software Engineer designs, develops, and tests software applications. Although typically focused on software, a software engineer may find this course helpful if they are looking to expand their understanding of how hardware operates. The course introduces high-level synthesis design flow for FPGAs, specifically using C/C++ to implement combinational logic. This may provide a software engineer with a different perspective on how hardware can be programmed and configured using familiar languages. The course may be useful for those curious about embedded systems or hardware acceleration. The course introduces Xilinx Vitis-HLS and Vivado, which are valuable tools in the hardware design space.
Computer Science Professor
A Computer Science Professor teaches computer science courses and conducts research. This course may be useful if teaching a course touching on hardware design, digital logic, or high-level synthesis. The course introduces high-level synthesis for FPGA design, focusing on implementing combinational logic circuits via C/C++. A professor may use the material to further their own understanding of hardware, and teach about the state of the art. The course’s focus on Xilinx Vitis-HLS and Vivado will help them become more familiar with tools used by industry. The course’s labs and projects may provide good examples when creating course content.
Electrical Engineering Professor
An Electrical Engineering Professor teaches electrical engineering courses at the college level and conducts research. This course may be useful in providing a new perspective on hardware design. The course introduces high-level synthesis for FPGA design, emphasizing how combinational circuits can be implemented using C/C++. An Electrical Engineering Professor may use this course as a reference for current practices in hardware design, and they may find the examples useful when talking about hardware or digital logic synthesis. The course’s focus on tools like Xilinx Vitis-HLS and Vivado will help them become familiar with modern industry practices. The course’s labs may provide additional context when teaching.
Technical Writer
A Technical Writer creates documentation for technical products and software. A technical writer who specializes in hardware or software engineering tools may find this course helpful in broadening their knowledge of high-level synthesis for FPGAs. This course may provide a useful overview of the high-level synthesis design flow, specifically focusing on the implementation of combinational circuits using C/C++. Although it does not directly correlate with writing, the hands-on experience may be useful. The course may also provide an industry perspective. The work with the Xilinx tools may be applicable to documenting products that use them.

Reading list

We've selected two books that we think will supplement your learning. Use these to develop background knowledge, enrich your coursework, and gain a deeper understanding of the topics covered in High-Level Synthesis for FPGA, Part 1-Combinational Circuits.
Provides a comprehensive overview of high-level synthesis techniques. It covers the theoretical foundations of HLS and provides practical examples of how to use HLS tools. This book adds more depth to the existing course by explaining the underlying algorithms and optimization techniques used in HLS. It useful reference tool for understanding the HLS design flow.
Provides a comprehensive overview of digital design principles, including combinational and sequential logic. It covers topics such as logic gates, Boolean algebra, and finite state machines, which are essential for understanding HLS. While not directly focused on HLS, it provides the necessary background for understanding the hardware generated by HLS tools. It is commonly used as a textbook in digital design courses.

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