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Learn the Essentials of VHDL and FPGA Development is course that will teach you the fundamentals and basics of VHDL design. Prior to working through the courses you will go through the VHDL design structure section that will explain the various concepts and terms needed to implement the projects in VHDL. In this course you will be working through various projects that will require you to go through the entire FPGA development process. You will be guided through the coding of the actual VHDL to the synthesis using either Xilinx’s development tool, Vivado or Altera/Intel's development tool Quartus. The projects in this course:
Learn the Essentials of VHDL and FPGA Development is course that will teach you the fundamentals and basics of VHDL design. Prior to working through the courses you will go through the VHDL design structure section that will explain the various concepts and terms needed to implement the projects in VHDL. In this course you will be working through various projects that will require you to go through the entire FPGA development process. You will be guided through the coding of the actual VHDL to the synthesis using either Xilinx’s development tool, Vivado or Altera/Intel's development tool Quartus. The projects in this course:
Shift Register Design
A project that takes you through the design and simulation steps to fully test and implement a shift register.
Buttons & LEDs
A project that is designed to teach students the very basics of VHDL as well as how to make specific pins on an FPGA inputs (buttons) and outputs (LEDs).
All of the required background and knowledge to complete each project will be explained prior to completing the projects above. There are demonstration videos and walkthroughs for each project so that you can have a deep understanding of how the project works. Walkthroughs of the completed projects are also included to further your understanding of how these designs are implemented.
This lecture introduces the course and instructor to the students.
This lecture introduces VHDL and how it'll be used in this course.
This lecture goes through the steps for creating a project in Vivado, which is a tool used to implement VHDL designs on a Xilinx FPGA.
This lecture goes through the steps for creating a project in Quartus, which is a tool used to implement VHDL designs on a Intel FPGA.
This lectures covers the various keywords used in VHDL.
This lecture walks through several of the common VHDL libraries.
This lecture explains what the entity and architecture portions of the VHDL design are.
This lecture discusses VHDL generics and how they are used.
This lecture describes the various data types used in the VHDL language.
This lecture discusses the specific VHDL data type integer.
This lecture discusses how the when-else statement is used in a VHDL design.
This lecture discusses the difference between concurrent and sequential statements in VHDL.
This lecture introduces the simulation section in this course.
This lecture talks through a shift register design.
This lecture goes through the process for creating a test bench.
This lecture walks through the process of creating a TCL script for simulation.
This lecture introduces the tool ModelSim, used to simulate VHDL designs.
This lecture walks through the process of creating a project in ModelSim.
This lecture walks through how to run a simulation in ModelSim, step by step.
This lecture provides an example of creating a *.tcl script for use within ModelSim.
This lecture explains how to navigate various portions of the ModelSim software.
This lecture introduces the Vivado VHDL simulation tool.
This lecture walks through using the Vivado simulation tool.
This lecture shows how to navigate the Vivado simulations.
This lecture talks about what is required to complete this project.
This is the complete design walkthrough for the button led project.
This lecture goes through what is required to place the IO on the Arty A7.
This explains how to generate a Xilinx programming file.
This lecture explains how to program the Arty A7 development board.
This is the demonstration of the completed project running on the Arty A7.
This lecture goes through the pin placement process for the DE10 Nano development board.
This lecture walks through the process for generating the Intel programming file.
This lecture describes how to program the DE10 Nano Development board.
This is a demonstration of the completed project running on the DE10 Nano development board.
This lecture discusses what a VHDL process is.
This lecture talks about how if statements are used and the specific syntax.
This lecture explains how if statements can be used to implement prioritization.
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Well-organized content flow.
Covers use of major FPGA tools.
Accessible introduction to the subject.
Hands-on labs and demos are valuable.
Provides a strong base for beginners.
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