High-Level Synthesis for FPGA, Part 2 - Sequential Circuits from Udemy

This course is an introduction to sequential circuits design in high-level synthesis (HLS). The goals of the course are describing, debugging and implementing sequential logic circuits on FPGAs using only C/C++ language without any help from HDLs (e.g., VHDL or Verilog).

It uses the Xilinx HLS software and hardware platforms to demonstrate real examples and applications. The course mainly uses the Xilinx Vitis-HLS toolset to describe, simulate and synthesise a high-level design description into the equivalent HDL code. The course also explains how to use the Integrated Logic Analyser (ILA) IP in Vivado to perform real-time debugging on the Basys3 board.

This course is the first of its kind that builds the HLS design flow and skills along with the digital logic circuit concepts from scratch. Along the course, you will follow several examples describing the HLS concepts and techniques. The course contains numerous quizzes and exercises for you to practice and master the proposed methods and approaches. In addition, the course utilises three exciting projects to put all the explained concepts together to design real circuits and hardware controllers.

This course is the second of a series of courses on HLS in designing hardware modules and accelerating algorithms on a target FPGA. Whereas this course focuses on sequential circuits, the first course explains how to describe combinational circuits in HLS. The other courses in the series will explain how to use HLS in designing advanced logic circuits, algorithm acceleration, and hybrid CPU+ FPGA heterogeneous systems.

What's inside

Learning objectives

Designing sequential logic circuits with c/c++ language using the hls approach
Understanding the basic concepts of high-level synthesis (hls)
Using hls concepts for designing sequential logic circuits
Hls design flow for fpgas

Working with xilinx vitis-hls and vivado design suite toolsets
How to generate rtl hardware ips using vitis-hls
Writing c-testbench in hls
Implementing three exciting projects with hls

Designing sequential logic circuits with c/c++ language using the hls approach
Understanding the basic concepts of high-level synthesis (hls)
Using hls concepts for designing sequential logic circuits
Hls design flow for fpgas
Working with xilinx vitis-hls and vivado design suite toolsets
How to generate rtl hardware ips using vitis-hls
Writing c-testbench in hls
Implementing three exciting projects with hls

Syllabus

Prologue

Introduction

Course Structure

HW/SW Setup

Vivado-HLX

Vivado and Vitis-HLS

Install Vivado HLx

Test Installation

D Flip-Flop (DFF)

Definition

Memory Cell

Sequential Circuits

Clock Signal

State Concept

Reset Signal

DFF LAB01

DFF LAB02

Exercises

7Segment Vivado

Single Cycle Design Flow

Integrated Logic Analyzer (ILA)

Definition and Idea

Parallel to Serial

Serial to Parallel

IP-Centric Design Flow

Parallel-Serial-Parallel LAB

Testbench 01

Parallel to Serial Testbench

Serial to Parallel Testbench

Input Waveform

State Machine

Four-Digit Counter

Concepts

Template

Combination Lock-VitisHLS

CombinationLock-Vivado

Utilities

Function Pipelining

Timer

Debouncer

Counter

Clock Generator

Pulse Generator

Single-Cycle Regular Pulses

Edge Detector

Vending Machine

PMOD

Vitis-HLS

Vivado

Port Level ap_hs

Multi-Cycle Design

Pipeline Design

Performance Metrics

IIR Example

SCII Proc&Cons

Seven Segments

7Segment Driver

7Segment HLS

PMOD LED

PMOD Keyboard

Interface Synthesis

Block Level ap_ctrl_hs

Block Level ap_ctrl_hs: vitis-hls

Port Level ap_vld

Port Level ap_ack

Project 1: Digital Dice

Good to know

Know what's good

, what to watch for

, and possible dealbreakers

Uses Xilinx HLS software and hardware platforms, which are industry standards, to demonstrate real examples and applications for designing sequential logic circuits

Builds HLS design flow and skills along with digital logic circuit concepts from scratch, making it suitable for both beginners and those with some experience

Explains how to use the Integrated Logic Analyser (ILA) IP in Vivado, which is essential for real-time debugging on the Basys3 board during hardware development

Focuses on sequential circuits, complementing the first course on combinational circuits, and prepares learners for advanced topics like algorithm acceleration and hybrid CPU+FPGA systems

Requires Xilinx Vitis-HLS and Vivado design suite toolsets, which may require a license or specific hardware setup, potentially posing a barrier for some learners

Utilizes the Basys3 board for real-time debugging, which learners will need to acquire if they want to fully replicate the labs and projects in the course

Activities

Be better prepared before your course. Deepen your understanding during and after it. Supplement your coursework and achieve mastery of the topics covered in High-Level Synthesis for FPGA, Part 2 - Sequential Circuits with these activities:

Review Digital Logic Fundamentals

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Solidify your understanding of digital logic concepts. This will provide a strong foundation for understanding sequential circuit design in HLS.

Browse courses on Sequential Logic

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Review textbooks or online resources on digital logic.
Work through practice problems on flip-flops and state machines.
Summarize key concepts and definitions.

Read 'Digital Design and Computer Architecture' by Harris and Harris

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Gain a deeper understanding of digital design principles. This book will help you bridge the gap between high-level descriptions and hardware implementation.

View Digital Design and Computer Architecture on Amazon

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Read the chapters on sequential logic and state machines.
Work through the examples and exercises in the book.
Relate the concepts to the HLS design flow.

Implement Basic Sequential Circuits in Vitis HLS

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Reinforce your understanding of sequential circuit design by implementing basic circuits in Vitis HLS. This will give you hands-on experience with the tool and the design flow.

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Implement a D flip-flop in Vitis HLS.
Implement a simple counter in Vitis HLS.
Simulate and verify the functionality of the circuits.

Four other activities

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Show all seven activities

Create a Tutorial on State Machine Design in HLS

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Deepen your understanding of state machine design by creating a tutorial for others. This will force you to organize your knowledge and explain the concepts clearly.

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Choose a specific aspect of state machine design in HLS.
Write a clear and concise explanation of the concept.
Include examples and illustrations to aid understanding.
Share your tutorial with others and solicit feedback.

Design a Simple Traffic Light Controller

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Apply your knowledge of sequential circuits and HLS to design a practical application. This project will solidify your understanding of the concepts and the design flow.

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Define the states and transitions of the traffic light controller.
Implement the state machine in Vitis HLS.
Simulate and verify the functionality of the controller.
Synthesize the design and implement it on an FPGA.

Read 'High-Level Synthesis: From Algorithm to Digital Circuit' by Philippe Coussy and Adam Morawiec

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Expand your knowledge of HLS techniques. This book will provide a deeper understanding of the underlying principles and optimization strategies.

View Putting Knowledge to Work on Amazon

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Read the chapters on scheduling, allocation, and binding.
Study the examples of HLS for sequential circuits.
Relate the concepts to the Vitis HLS tool.

Contribute to an Open-Source HLS Project

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Gain real-world experience with HLS by contributing to an open-source project. This will expose you to different design styles and challenges.

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Find an open-source HLS project on GitHub or GitLab.
Study the project's documentation and code.
Identify a bug or feature that you can contribute.
Submit a pull request with your changes.

Career center

Learners who complete High-Level Synthesis for FPGA, Part 2 - Sequential Circuits will develop knowledge and skills that may be useful to these careers:

FPGA Engineer

An FPGA engineer specializes in designing and implementing digital circuits on Field-Programmable Gate Arrays, and this course is squarely aligned with those responsibilities. This course gives future FPGA engineers the ability to use the HLS design flow and digital logic circuit concepts, with a focus on sequential logic implementation using C/C++. The course emphasizes practical skills using the Xilinx Vitis-HLS toolset, vital for FPGA development. Given the practical projects included, such as designing hardware controllers, someone interested in FPGA engineering would find this course especially helpful. This practical experience greatly enhances the skills that are needed for FPGA development.

See salaries and explore the career path for FPGA Engineer

Digital Design Engineer

A digital design engineer focuses on the implementation of digital circuits and systems, making this course a great step toward that career. Digital design engineers need a strong understanding of both digital logic and design tools, and this course gives a solid background in both through the approach of high-level synthesis for FPGAs. The course provides training in describing and building sequential logic circuits using C/C++, and it relies on Xilinx Vitis-HLS and Vivado, tools used in many professional settings. The multiple practical projects give opportunities to develop and refine skills in digital circuit design. This course helps a future digital design engineer learn the foundations needed for the job.

See salaries and explore the career path for Digital Design Engineer

Hardware Engineer

A hardware engineer designs, develops, and tests computer hardware components, and this course directly strengthens skills required in that role. Hardware engineers need a robust understanding of digital logic circuits, and this course provides exactly that in the context of high-level synthesis for FPGAs. By describing, debugging, and implementing sequential logic circuits using C/C++, this course helps build a foundation for a hardware engineer to design and validate hardware implementations. Specifically, this course teaches how to use Xilinx Vitis-HLS and Vivado which are important industry tools for hardware development. The hands-on projects, such as creating a digital dice, further solidify this practical knowledge, making you more prepared for the challenges of hardware engineering.

See salaries and explore the career path for Hardware Engineer

Embedded Systems Engineer

An embedded systems engineer develops software and hardware for embedded systems, and this course is invaluable for that role. Embedded systems often make use of FPGAs, and understanding how to design circuits on them using high-level synthesis is highly beneficial. This course teaches how to describe, debug, and implement sequential logic circuits using C/C++ for FPGAs, while specifically emphasizing the use of Xilinx tools. The projects, like designing a digital dice, provide practical experience directly relevant to embedded systems design. Someone who wants a career as an embedded systems engineer should take this course to gain essential skills in hardware design.

See salaries and explore the career path for Embedded Systems Engineer

ASIC Design Engineer

An ASIC design engineer is responsible for designing Application Specific Integrated Circuits. This course is particularly useful for anyone aspiring to work in this field. The concepts of high-level synthesis, digital logic, and sequential circuits are fundamental to ASIC design, and this course will introduce you to those directly using C/C++. Using Xilinx Vitis-HLS and Vivado, as taught in the course, provides practical experience with industry-standard tools. The course projects, like developing a digital dice, further reinforce the concepts necessary for ASIC design. This course may be beneficial to building a solid background in the foundations of ASIC design.

See salaries and explore the career path for ASIC Design Engineer

Computer Architect

A computer architect designs the overall structure and organization of computer systems, including the hardware components. This course may be useful for a computer architect, as understanding high-level synthesis for FPGAs can help in designing custom hardware accelerators. Specifically, this course teaches how to describe, design, and implement sequential logic circuits using C/C++ and the Xilinx toolset. The course's focus on the HLS design flow for FPGAs, along with the projects, provide a foundation for understanding the creation of hardware systems. Although this course may not cover the breadth of computer architecture, it does give relevant skills and knowledge to a computer architect who deals with custom hardware elements.

See salaries and explore the career path for Computer Architect

Firmware Engineer

A firmware engineer develops low-level software that controls hardware components, and this course may be relevant because it provides skills in hardware design using high-level synthesis. This course focuses on using C/C++ to describe, debug, and implement sequential logic circuits on FPGAs using Xilinx tools. Because much firmware interfaces with hardware, having a basic understanding of how hardware is designed that this course provides can be beneficial. The course projects will also provide experience in hardware control that may be useful for a firmware engineer. This course may be helpful for a person entering the field of firmware engineering.

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Research Scientist

A research scientist conducts scientific research, and this course may be useful for research scientists who work with hardware. Often research involves building custom hardware for experiments. Understanding high-level synthesis for FPGAs is helpful for building custom hardware efficiently. This course provides the skills to describe, debug, and implement sequential logic circuits using C/C++ and Xilinx tools. This experience could help someone involved in scientific research. The course's approach in integrating hardware design from initial concept to implementation will be especially useful to a research scientist. This course may be useful for a scientist who wishes to build digital hardware.

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Robotics Engineer

A robotics engineer designs and builds robots, which often involves a mix of hardware and software. This course may be useful for those interested in the hardware aspects of robotics, specifically digital circuit design using FPGAs. By teaching how to implement sequential logic circuits using the HLS approach with C/C++, this course lays a foundation for creating hardware controllers needed in robotics. The use of Xilinx tools also provides practical skills. The projects included in the course, though not directly robotics-focused, help build problem-solving abilities in hardware design using high-level synthesis, which is useful when designing robot controllers. This course may be helpful for an engineer working with hardware in robotics.

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Computer Engineering Professor

A professor of computer engineering teaches and researches computer engineering topics. This course may be useful for a computer engineering professor who studies or teaches with FPGAs. The course provides an introduction to high-level synthesis and the process of building sequential logic circuits using C/C++. This directly relates to teaching digital design concepts. The use of Xilinx tools also provides experience with industry-standard software, which is important for a professor to convey to students. The course may be helpful for a professor who wants to keep current and teach about high-level synthesis.

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Systems Engineer

A systems engineer works on the development of complex systems, and this course may be helpful with understanding the hardware design aspects of such systems. This course focuses on high-level synthesis for FPGAs with C/C++. It teaches the design of sequential logic circuits, a relevant concept in both software and hardware systems. The course also introduces the use of Xilinx tools, which may be used in some systems engineering projects. Therefore, having background on how to design digital circuits on FPGAs using tools like Vitis-HLS can be beneficial. This course may help those with an interest in the hardware aspects of systems engineering.

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Algorithm Developer

An algorithm developer is responsible for designing and implementing algorithms, and this course may be beneficial if that role requires optimization at the hardware level. The course focuses on high-level synthesis for FPGAs, teaching how to describe and implement sequential logic circuits in C/C++, which is relevant for algorithmic speedups. By teaching the use of Xilinx tools for hardware design, this course may help an algorithm developer to consider hardware acceleration. The multiple practical projects will also give hands-on experience with hardware implementations. This course may be useful for an algorithm developer seeking to optimize at the hardware level.

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Software Engineer

A software engineer develops software applications, and this course may be useful for a software engineer who interfaces with hardware. While traditionally, software engineers don't need to know low-level hardware implementation, this course teaches how to use C/C++ to describe, debug, and implement digital logic circuits on FPGAs. The course may help familiarize a software engineer with how physical hardware is built. The projects provide hands-on experience that might be relevant for someone working in low-level software. Although not central to the work of a typical software engineer, this course may be useful to those with an interest in hardware.

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Technical Consultant

A technical consultant provides expert advice and guidance on technology-related topics, and this course may be relevant if that expertise is needed on digital hardware systems. Understanding how to design hardware using high-level synthesis with C/C++ is a valuable skill for a technical consultant. This course provides this skill by teaching the design of sequential logic circuits on FPGAs using Xilinx tools. The course gives a foundational experience in hardware development, which may be relevant when advising clients. This course may be useful for a consultant who works in hardware or needs to understand hardware design for their clients.

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Data Scientist

A data scientist analyzes large data sets to derive insights, and this course may be helpful for those who might use custom hardware. While not central to the job, this course teaches high-level synthesis for FPGAs with C/C++, a skill that is helpful for custom hardware acceleration in some data intensive workloads. This course provides hands-on experience in describing, debugging, and implementing sequential logic circuits using Xilinx tools. This background might be useful for a data scientist who needs to optimize their workflow. This course may be useful for data scientists who want to explore hardware acceleration.

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High-Level Synthesis for FPGA, Part 2 - Sequential Circuits

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