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VLSI Placement and Global Routing Using Simulated Annealing

Carl Sechen

My flJ'St implementation of simulated annealing was for an island-style gate array placement problem. This work is presented in the Appendix of this book.

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VLSI Placement and Global Routing Using Simulated Annealing (The Springer International Series in Engineering and Computer Science, 54)

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Length: 298 pages

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